FPGA/Digital Lead Engineer

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C-Level / ManagerFull-time·Umowa o pracę
#443875·Dodano 8 dni temu·2
Źródło: rocketjobs.pl
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Tech Stack / Keywords

ModelSimQUARTUSVivadoVivadoPythonVHDLSystemVerilogprojektowanie FPGADMA

Wymagania

  • Proficient in FPGA design and implementation
  • Experience with ModelSim, QUARTUS, and Vivado design tools
  • Skilled in hardware description languages: VHDL and SystemVerilog
  • Knowledge of DMA architecture and interfacing
  • Ability to use Python for scripting and automation
  • English language proficiency at B2 level

Obowiązki

  • Lead digital design and development using FPGA technologies
  • Design and implement FPGA modules with VHDL and SystemVerilog
  • Utilize development tools including ModelSim, QUARTUS, and Vivado
  • Integrate and manage Direct Memory Access (DMA) within FPGA designs
  • Collaborate on software interfacing, notably with Python scripts
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