FPGA Engineer

• Minimum 4 years of experience in FPGA-based systems and embedded Linux software development.
• English proficiency level B2.
• Strong proficiency in VHDL for RTL design.
• Experience with Verilog in mixed-language designs.
• Solid programming skills in C++ and Python.
• Hands-on experience with Xilinx Zynq-7000 SoC, Intel/Xilinx FPGAs, Vivado, and Quartus Prime.
• Deep understanding of embedded Linux, including building images with PetaLinux, kernel customization, and device tree configuration.
• Proven skills in developing user-space PCIe Linux drivers based on VFIO.
• Experience with RTL verification using Cocotb and ModelSim.
• Hardware debugging skills using Vivado ILA and GDB.
• Knowledge of communication protocols: AXI4, AXI4-Lite, AXI4-Stream, PCIe, Ethernet (MII, GMII, RGMII).

Nice to have:

• Experience with FPGA-in-the-loop verification over PCIe.
• Mentoring junior engineers and conducting VHDL code reviews.
• Automating verification flows in Python and regression testing in Jenkins.
• Familiarity with NVIDIA Jetson modules, UEFI boot flows, and prototyping board bring-up.
• Domain knowledge in Telecom (e.g., OFDM modems), Radar calibration, Semiconductors, or 3D scanning.
• Experience with digital signal processing algorithms and test result analysis in MATLAB.

• Develop FPGA-based systems and embedded Linux software.
• Design RTL using VHDL and work with mixed-language designs including Verilog.
• Program hardware control applications and golden models using C++ and Python.
• Utilize Vivado and Quartus Prime for FPGA development on platforms like Xilinx Zynq-7000 SoC and Intel/Xilinx FPGAs.
• Build embedded Linux images using PetaLinux (Yocto-based), customize kernels, and configure device trees.
• Develop Linux drivers, including user-space PCIe drivers using the VFIO framework.
• Verify RTL designs using Cocotb testbenches in ModelSim against golden models.
• Debug real hardware using Vivado ILA and GDB.
• Work with communication protocols and interfaces such as AXI4, AXI4-Lite, AXI4-Stream, PCIe, and Ethernet (MII, GMII, RGMII).