Principal L1 PHY & Modem Implementation Engineer

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
• 10+ years of experience in L1 PHY software, modem implementation, DSP implementation, embedded communications software, or related areas.
• Strong understanding of OFDM-based communication systems and major transmit and receive PHY processing chains.
• Experience implementing or integrating L1 PHY processing on CPUs, DSPs, SoCs, FPGAs, ASIC accelerators, or heterogeneous processing architectures.
• Strong understanding of HW/SW partitioning and hardware acceleration of computationally intensive modem functions.
• Experience with performance profiling and optimization, multicore processing, memory management, and efficient data movement.
• Experience working with interfaces between L1 software, embedded firmware, and custom hardware or hardware accelerators.
• Ability to work across modem, DSP, ASIC, FPGA, firmware, BSP, and system engineering teams.

Nice to have:

• Master's degree or Ph.D. in Electrical Engineering, Computer Engineering, Communications, Signal Processing, or a related field.
• Deep experience with L1 PHY and modem implementation for wireless, cellular, satellite, or broadband communication systems.
• Experience with FEC processing, including LDPC, Turbo, or Polar coding, rate matching, and LLR processing.
• Experience with FFT/IFFT processing, modulation/demodulation, MIMO, beamforming, or other computationally intensive PHY functions.
• Familiarity with synchronization, carrier and sampling frequency offset compensation, timing recovery, channel estimation, equalization, and SNR estimation from an implementation and integration perspective.
• Experience with SIMD/vector processing, multicore optimization, DSP processors, or other high-performance embedded computing architectures.
• Experience with fixed-point implementation and translating floating-point DSP algorithms into production implementations.
• Experience with MATLAB, Python, or equivalent environments for simulation, analysis, and implementation validation.
• Experience with embedded real-time operating systems, BSPs, device drivers, or SoC initialization.
• Experience with pre-silicon simulation, FPGA prototyping, hardware emulation, or post-silicon modem bring-up and validation.
• Experience with satellite or non-terrestrial communication systems.
• Familiarity with 3GPP PHY specifications and modern broadband wireless communication systems.

• Develop and optimize L1 PHY and modem implementations for high-throughput satellite communication systems.
• Implement and integrate PHY processing functions, including framing, FEC processing, rate matching, scrambling, modulation/demodulation, FFT/IFFT processing, reference-signal processing, and related transmit and receive functions.
• Develop and optimize C/C++ or equivalent implementations of L1 PHY and DSP processing functions for embedded and real-time modem systems.
• Define and evaluate HW/SW partitioning of modem functions across programmable processors, DSP engines, FPGA/ASIC hardware accelerators, and embedded software.
• Analyze and optimize modem processing across throughput, latency, computational complexity, memory bandwidth, data movement, and processor utilization.
• Optimize multicore processing, memory organization, buffering, concurrency, and hardware-accelerator utilization for high-throughput L1 processing.
• Work with modem algorithm engineers to translate communications and DSP algorithms into production implementations.
• Work with ASIC, FPGA, firmware, BSP, and system engineering teams to define and integrate interfaces between L1 software and modem hardware accelerators.
• Support pre-silicon verification, simulation, prototyping, system integration, and post-silicon validation of L1 PHY and modem implementations.
• Debug system-level issues spanning L1 software, DSP processing, hardware accelerators, firmware, and ASIC interfaces.
• Evaluate modem architecture and implementation tradeoffs across performance, complexity, throughput, latency, memory, power, and hardware resources.
• Provide technical guidance and contribute to L1 PHY, HW/SW partitioning, and modem implementation architecture decisions.

• Candidates may be subject to verification and BGS screening as per applicable law.