Principal Verification Engineer

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent experience.
• Minimum ten years of professional experience in ASIC or SoC functional verification.
• Hands-on expertise in SystemVerilog and UVM testbench development, plus metric-driven verification.
• Experience as a verification technical lead on at least one taped-out silicon program.

Nice to have:

• Recognized depth in at least one verification specialty applied on production silicon programs.
• Formal verification experience on production silicon, including connectivity, register maps, arbitration, CDC, or security properties.
• Gate-level simulation experience, including timing-aware and post-layout runs and debugging.
• Verification background in wireless or wired communication systems, including modem, baseband, PHY, or DSP hardware.
• Experience verifying LDPC, FEC, framing, or beamforming logic using bit-accurate reference models and fixed-point analysis.
• Experience developing C-based or portable stimulus for SoC, CPU boot, and firmware-driven scenarios.
• Experience applying AI, ML, or LLM tooling to stimulus generation, regression triage, or coverage analysis.

• Lead chip-level and complex subsystem verification through sign-off, collaborating with global engineering teams.
• Own verification strategy, test plans, and measurable coverage goals across assigned subsystems and SoC.
• Identify verification gaps, propose methodology changes, and implement them across the verification organization.
• Serve as a subject area expert, set technical direction, and resolve escalated verification problems.
• Architect reusable verification environments, reference models, and infrastructure spanning IP, subsystem, and SoC levels.
• Drive regression health, coverage closure, and sign-off readiness across simulation and formal results.
• Review testbench architecture and debug approaches, and mentor engineers in verification methodology.
• Partner with design, architecture, and modeling teams to align verification with program milestones.

• Willingness to travel up to 10 percent to other team locations.