Blue Origin

Senior DSP Fixed-Point Design Engineer

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SeniorOn-site·KrakówFull-time·Umowa o pracę

#460757·Dodano 29 dni temu·2

Źródło: justjoin.it

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Tech Stack / Keywords

engl

Podsumowanie oferty

Join the Silicon Development team working on TeraWave, a satellite communications network. Convert DSP algorithms into optimized fixed-point hardware architectures and collaborate with RTL and verification teams using MATLAB, C++, or Python.

Wymagania

BS or MS in Electrical Engineering, Computer Engineering, or a closely related field.
5+ years of hands-on experience in silicon, ASIC, or FPGA development, focused on DSP hardware implementation.
Deep understanding of fixed-point arithmetic, quantization noise modeling, overflow and underflow handling, dynamic range management, and scaling techniques.
Expert proficiency in MATLAB, C++, and/or Python (including NumPy/SciPy) for algorithm modeling, simulation, and automated verification workflows.
Strong foundation in digital signal processing, including FIR/IIR filter design, FFT architectures, multi-rate signal processing, and automatic gain control (AGC).
Ability to document and communicate technical trade-offs to engineering peers and program leadership.

Nice to have:

Experience with High-Level Synthesis (HLS) tools such as Catapult HLS or Vivado/Vitis HLS.
Familiarity with RTL design (Verilog/SystemVerilog) and front-end ASIC flows, including synthesis, timing closure, and formal verification.
Exposure to wireless communications standards (5G/6G, Wi-Fi) or AI/ML hardware accelerator design.

Obowiązki

Convert floating-point DSP algorithms into bit-true, cycle-accurate fixed-point models using MATLAB, C++, or Python.
Analyze quantization noise, finite word-length effects, and area, power, performance, SNR, and EVM trade-offs.
Define and document hardware-friendly DSP architectures, including pipeline structures, word lengths, rounding modes, overflow and saturation logic, and scaling strategies.
Collaborate with RTL designers on hardware blocks such as multipliers, CORDIC engines, FFTs, and digital filters; review RTL code against bit-true reference models.
Generate fixed-point test vectors and golden reference models for pre-silicon design verification and post-silicon validation.
Optimize micro-architectures for low power, high throughput, and minimal silicon area in custom hardware accelerators for guidance, navigation, communications, and sensor processing.
Collaborate with systems engineering, avionics, and software teams to ensure hardware implementations meet end-to-end system requirements.

Inne informacje

Candidates may be subject to verification and BGS screening as required by applicable law.

Blue Origin

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