Senior Embedded Systems/IoT Hardware Architect (Fixed-scope for expert: 100 hours over 4 weeks, 25 h/week (fractional))

17k - 20k PLN17 000 - 20 000 PLN/ mies./ mies.UoPUmowa o pracę (brutto)

SeniorZdalnieFull-time·Umowa o pracę

#479896·Dodano wczoraj·0

Źródło: nofluffjobs.com

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Tech Stack / Keywords

nimble• Native Espressif ESP-IDFArduino-frameworkPCB designlayout optimization for EMC complianceautomated SMT assembly lineselectronic products for IEC 60601-1 or ICB SchemeMDR regulatory submissionsBLE coexistenceEMI debugging

Podsumowanie oferty

This role covers verification and remediation of an embedded systems/IoT hardware design, including updated PCB files, firmware fixes, manufacturing files, and certification-readiness documentation. The work includes ESP-IDF, NimBLE, PCB design, and EMC and isolation improvements.

Wymagania

Proven experience preparing electronic products for IEC 60601-1 or IEC 62368-1 laboratory testing.
Experience with native Espressif ESP-IDF and NimBLE; Arduino framework-only backgrounds are not suitable.
Expertise in PCB design and layout optimization for EMC compliance, including shielding, galvanic isolation, 2xMOPP requirements, and split ground planes.
Experience formatting files for automated SMT assembly lines, including centroid data, fiducials, and panelization.
Own an independent, fully equipped home hardware testing laboratory with an oscilloscope, logic analyser, and relevant test equipment.

Nice to have:

Prior involvement in CB Scheme or MDR regulatory submissions.
Familiarity with high-voltage / voltage-multiplier circuit design.
Experience with BLE coexistence and EMI debugging in mixed-signal designs.

Obowiązki

Produce a written verification audit report with a prioritized remediation plan.
Update PCB design files, including the source files and Gerbers, with corrected high-voltage multiplier topology, production power supply, and EMC/isolation improvements.
Update the firmware repository with BLE stability fixes and a documented build environment.
Prepare an SMT-ready manufacturing package with centroid files, panelization, and fiducial documentation.
Prepare certification-readiness documentation for IEC 60601-1 / CB Scheme submission.
Complete a final handover with a walkthrough session and recorded summary of outstanding risks.
For remediation that can only be physically validated on a newly fabricated PCB, deliver the design and validated simulation during the engagement; physical prototype validation is excluded.

Benefity

Planned DFM support retainer of approximately 10 hours per month at the same rate, plus two further hardware projects in the pipeline for a proven performer.
Invoiced weekly and paid within two working days.

Inne informacje

Remote engagement is limited to candidates based in Poland.
The engagement is planned for four weeks from commencement, with 25 hours per week and 100 hours total; the candidate controls their schedule provided a daily approximately 30-minute sync window overlaps with the client.
If Tier 1 work has consumed more than 85% of contracted hours by the end of Week 3, Tier 2 deliverables move to an agreed extension week at the same hourly rate, jointly decided and confirmed in writing.

SC21 OPTIONS PTE LTD

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