Compiler Expert / Triton Performance Optimization Expert

• Strong expertise or hands-on experience in at least one of the following: CUDA, Triton, PTX, or LLVM IR.
• Experience in compiler optimizations, backend code generation, or register allocation.
• Extensive experience in developing and optimizing high-performance GPU or NPU kernels.
• Familiarity with CUDA or similar parallel programming environments.
• Experience in open-source development and collaborative engineering practices.
• Strong system design and software engineering skills, with the ability to balance performance, maintainability, and generality in complex systems.
• Strong interpersonal skills with the ability to lead and motivate teams effectively.
• Master’s or Ph.D. degree in Computer Architecture, Compiler Design, High Performance Computing, or a related field.

• Lead the development of Triton compiler and kernel performance optimization frameworks, driving high-performance implementations of deep learning operators on NPUs.
• Design and implement highly optimized Triton kernels for core operators such as Attention, MatMul, LayerNorm, Convolution, and Softmax.
• Improve and extend the Triton compilation pipeline, including optimization passes and code generation quality.
• Optimize memory access patterns and parallel scheduling strategies, with deep understanding of performance factors such as memory footprint and instruction scheduling.
• Collaborate closely with NPU architecture and performance teams to co-design performance-critical features.
• Track and evaluate state-of-the-art AI compiler technologies (e.g., MLIR, Apache TVM, Hidet, CUTLASS), and introduce innovative designs to improve overall system performance.
• Build and lead a Triton compiler optimization team; communicate results with cross-functional teams and leadership; contribute to open-source ecosystems such as Triton and LLVM.

Full time office work in Wola, Warsaw